7 Segment Decoder Implementation, Truth Table, Logisim Diagram

7 Segment Decoder Implementation, Truth Table, Logisim Diagram:

7 Segment Decoder:

For reference check this Wikipedia link.


Pictures:

(Wikipedia CC BY-SA 2.5)

7 Segement Display
7 Segment Display with pins shown
Individual segments 7 Segment Display marked
Individual segments 7 Segment Display marked

Explanation:

Before we start implementing we first need to check if it is common anode or common cathode. If it is common anode then 3rd pin in both top and bottom are VCC. But if it is we should connect 3rd pin in both top and bottom to ground.

Pins:

show top pins then bottom pins ( Dot side is down ).

        Pin1   Pin2   Pin3   Pin4   Pin5
Top:     g      f    vcc/GND   a     b
Bottom:  e      d    vcc/GND   c     dp

Truth Table:

DLD 7-segment Display Truth Table
DLD 7-segment Display Truth Table

From here we can get minimized expressions for a, b, c, d, e, f, g using K-MAP. Here we only need value 0 though 9 rest are don’t care terms. Using those don’t care terms we will try to maximum ones first.

K-Map (Karnaugh map) for ‘a’:

We can follow similar procedure for the rest. K map for ‘a’ can be created by taking the ‘a’ column from the table above and setting the value 0 / 1 to corresponding location in the table. For example to display 0 ( 0000 )  ‘a’ is always 1. Similarly to display 1 ‘a’ is always 0. For value ( 10 – 16 ) we don’t care about them so they are used as don’t care term in k map.

k-map-a-output-7-segment
k-map a output 7 segment

Using Logisim to generate circuit diagram:

1
Go to Window -> Computational Analysis
  • Go to Window -> Computational Analysis

 

2
Now input D, C, B, A as in which case D is MSB and A is LSB. Otherwise A, B, C, D can also be inputs and MSB, LSB will be opposite.
  • Now input D, C, B, A as in which case D is MSB and A is LSB. Otherwise A, B, C, D can also be inputs and MSB, LSB will be opposite.

 

3
Now input the table given above in the table tab. We can just input values by single or double clicks.
  • Now input the table given above in the table tab. We can just input values by single or double clicks.

 

4
finished table

 

5
expressions for each of the output variables

 

6
k map for each of the variables / outputs can be seen here

 

7
name the circuit and tick use two input gates, if you use two input gates otherwise its not needed.

 

8
Finished circuit diagram
  • Now just drag the 7 segment display from input / output folder and connect the ports according to given table above.

 

Logisim Diagram For Decoder Table:

7 segment display diagram
7 segment display diagram

 

Advertisements

Boolean Algebra Proofs Postulates and Theorems (Part 1)

Boolean Algebra Postulates and Theorems (Part 1):


First familiarize with truth tables so it’ll be easier to understand.

 

x + 0 = x

here only two possible states of x, 0 remains constant

x = 0
x = 1

So,

false OR false is always false
0 + 0 = 0
true OR false is always true
1 + 0 = 1

So, from this we can see whatever the value of x is, the output is always equal to x.


 

 x . 1 = x

here only two possible states of x, 1 remains constant

x = 0
x = 1

So,

false AND true is always false
0 . 1 = 0
true AND true is always true
1 . 1 = 1

So, from this we can see whatever the value of x is, the output is always equal to x.


 

 x + 1 = 1

here only two possible states of x, 1 remains constant

x = 0
x = 1

So,

false OR true is always true
0 + 1 = 1
true OR true is always true
1 + 1 = 1

So, from this we can see no matter the value of x, OR with 1 (true) always gives a 1 (true) value.


 

 x . 0 = 0

here only two possible states of x, 0 remains constant

x = 0
x = 1

So,

false AND false is always false
0 . 0 = 0
true AND false is always false
1 . 0 = 0

So, from this we can see no matter the value of x, AND with 0 (false) always gives a 0 (false) value.


 

 x + x’ = 1

x = 0, x' = 1
x = 1, x' = 0

So,

false OR true is always true
0 + 1 = 1
true OR false is always true
1 + 0 = 1

 

 x . x’ = 0

x = 0, x' = 1
x = 1, x' = 0

So,

false AND true is always false
0 . 1 = 0
true AND false is always false
1 . 0 = 0

 

 x + x = x

x = 0, x = 0
x = 1, x = 1

So,

false OR false is always false
0 . 0 = 0
true OR true is always true
1 . 1 = 1

So, we can whatever the value of x is, that is our output.


 

x . x = x

x = 0, x = 0
x = 1, x = 1

So,

false AND false is always false
0 . 0 = 0
true AND true is always true
1 . 1 = 1

So, again we can whatever the value of x is, that is our output.


 

 (x’)’ = x

x = 0, x' = 1, (x')' = 0
x = 1, x' = 0, (x')' = 1

So, we can see complementing twice gives the original value.

Digital Logic AND Gate with C Bitwise Operations

Digital Logic AND Gate with C Bitwise Operations:


AND Logic:

A, B is input, Q is output,

A . B = Q  /* AND is represented by dot ( . ) */

AND Truth Table,

A  B     Q (A . B)
==========
0  0     0
0  1     0
1  0     0
1  1     1

C Code:
In C, C++ AND bit wise AND can be performed using &( Ampersand )

Don’t confuse single logical AND ( Double Ampersand && ) with bitwise AND ( Single Ampersand & ).

printf("%d\n", 5 & 6 );    /* Output 4  */
printf("%d\n", 8 & 4 );    /* Output 0  */
printf("%d\n", 54 & 29);   /* Output 20 */

Code Explanation:

Bit wise AND takes two binary digits of same length and performs AND operation on corresponding bits of first and second number. If both bits are 1 then result is 1, otherwise result is 0. Use the table given above.

5 & 6 = 4, 

0101 # 5        /* 0 + 4 + 0 + 1 = 5 */
0110 # 6        /* 0 + 4 + 2 + 0 = 6 */
=========
0100 # 4        /* 0 + 4 + 0 + 0 = 4 */

8 & 4 = 0, 

1000 # 8        /* 8 + 0 + 0 + 0 = 8 */
0100 # 4        /* 0 + 4 + 0 + 0 = 4 */
=========
0000 # 0        /* 0 + 0 + 0 + 0 = 0 */

54 & 29 = 20, 

0011 0110 # 54  /* 0 + 0 + 32 + 16 + 0 + 4 + 2 + 0 = 54 */
0001 1101 # 29  /* 0 + 0 +  0 + 16 + 8 + 4 + 0 + 1 = 29 */
==============
0001 0100 # 20  /* 0 + 0 +  0 + 16 + 0 + 4 + 0 + 0 = 20 */