7 Segment Decoder Implementation, Truth Table, Logisim Diagram:
7 Segment Decoder:
For reference check this Wikipedia link.
(Wikipedia CC BY-SA 2.5)
Before we start implementing we first need to check if it is common anode or common cathode. If it is common anode then 3rd pin in both top and bottom are VCC. But if it is we should connect 3rd pin in both top and bottom to ground.
show top pins then bottom pins ( Dot side is down ).
Pin1 Pin2 Pin3 Pin4 Pin5 Top: g f vcc/GND a b Bottom: e d vcc/GND c dp
From here we can get minimized expressions for a, b, c, d, e, f, g using K-MAP. Here we only need value 0 though 9 rest are don’t care terms. Using those don’t care terms we will try to maximum ones first.
K-Map (Karnaugh map) for ‘a’:
We can follow similar procedure for the rest. K map for ‘a’ can be created by taking the ‘a’ column from the table above and setting the value 0 / 1 to corresponding location in the table. For example to display 0 ( 0000 ) ‘a’ is always 1. Similarly to display 1 ‘a’ is always 0. For value ( 10 – 16 ) we don’t care about them so they are used as don’t care term in k map.
Using Logisim to generate circuit diagram:
Go to Window -> Computational Analysis
Now input D, C, B, A as in which case D is MSB and A is LSB. Otherwise A, B, C, D can also be inputs and MSB, LSB will be opposite.
Now input the table given above in the table tab. We can just input values by single or double clicks.
Now just drag the 7 segment display from input / output folder and connect the ports according to given table above.
Logisim Diagram For Decoder Table: